World’s first no-offset bus buffers enable I2C buses over 1km

NXP has introduced the industry’s first no-offset I2C-bus buffers, which enable system designers to isolate capacitance and interface with other bus buffers.

Picture: NXP

The PCA9525 and PCA9605 bus buffers use the no-offset scoreboard method to decide signal direction, rather than using a directional pin and relying on offset voltages to control direction and prevent bus latch-up. The no-offset devices are interoperable even with static offset or incremental bus buffers, allowing easy design-in regardless of which other devices are on the bus.

The company also launched the PCA9646 – the industry’s first fully buffered 4-channel switch with no-offset ports.

All devices work to 1 MHz, and the PCA9605 and PCA9646 support Fast-mode Plus (Fm+), which has 10x the normal I2C-bus drive, allowing longer I2C-buses or placement of more devices on the bus.

While I2C buses have traditionally been used in computing, consumer and portable applications where only short bus lengths are needed, the new Fm+ no-offset bus buffers and switch from NXP overcome this limitation by allowing buses to be broken into segments or branches to isolate the bus capacitance into lower capacitive segments meeting I2C-bus specifications.

Thus, the PCA9605 and PCA9646 enable I2C-based monitoring and control systems which can serve with hundreds of nodes and/or bus wiring lengths up to 1 km (0.62 miles) at lower frequencies. Designers can now consider running I2C communications over long distances, while using inexpensive commodity cabling such as CAT5 in enterprise computing applications such as servers and mass storage systems, and in industrial and automotive applications. The PCA9525 is useful in standard Fast-mode applications to isolate capacitance.

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